• The project involves implementation of echo canceling algorithms over speech signals within the context of VOIP protocol.
• Current Research and Implementation: Multirate Signal Processing application in the area of Music Transcription using DFT Filter Bank techniques and Polyphase structures to transcribe musical recordings into notes and scales. There are potential applications of this project for this emerging technology for Music Institutions and Industry.
• Conducted various independent projects in the area of electrical engineering applications: development of echo canceler using adaptive filtering algorithms, audio signal processing applications, research study in developing wireless applications of medical instrumentation for EKG and EEG, and more. The purpose of these projects was mainly dedicated to maintaining currency in the subject discipline of electrical engineering and specifically digital signal processing studies.
• Multirate Signal Processing Study to develop novel class of digital filter banks to perform quantitative study and prediction of cardiac arrests in real time by insertion of a wireless, non-invasive probes stationed in various areas of target organs, and transmit parameters to receiver processing unit for studies and analysis. Modeling such system to channel and identify abnormal behavior of specific vitals such as blood pressure, blood flow parameters, etc., and compare them in real time to a control parameter database. The main objective of such work is to establish a wireless link via an IP protocol between a host system that analyzes, and processes data stream in real time the flow of signals from the various signal sources.
• Multirate Signal Processing application in the area of Music Transcription using DFT Filter Bank techniques and Polyphase structures to transcribe musical recordings into notes and scales. There are potential applications of this project for this emerging technology for Music Institutions and Industry.
• Integrated analog data acquisition boards, discrete data relay boards, analog output boards from Cyber Research. Designed and developed initialization scripts structure, calibration test sequences and audio statistical modeling. Programmatically built Power Frequency and SINAD graphical representation of audio signals.
• The system includes an LMS adaptive filter that uses two signals as inputs: speech signal from the far end channel, and the reference signal from the microphone or mouthpiece.
• The project includes solution for two types of echo's, namely the near end and far end echo.
• The solution is to implement an adaptive echo canceler scheme comprising two units one for the near end and another for the far end depending on priority hierarchy.
• The system hardware involves interface for signal conversion and conditioning, and to the DSP engine which handles receiving incoming voice packets, processing through the echo cancelers, then channels them to either the receiver mike path, or the transmitting path.
- DSP Engineer at LSI Logic, Wireless Division
8 years, 8 months at this Job
at this Job
• EON600 Portable PA speaker system
• Hardware Feature Set and Front Panel Layout.
• All Microncontroller and DSP Firmware
• Technical Lead for EON600 Connect App for Android and IOS (100,000+ downloads)
• Beta Test Coordinator, Technical writer, and QA for both OS releases
• PRX700 Portable PA speaker system.
• Front Panel layout and Digital Design for hardware
• All Microncontroller and DSP Firmware.
• Monitor System Controller 1 (MSC1) for LSR2300 Speaker Series
• Hardware Feature set and layout logistics
• All Microncontroller and DSP Firmware
• Technical Lead for MSC1 Control Panel Software
• Windows XP/Vista/ 7 and Mac OS X.
• Beta Test Coordinator, Technical Writer, and QA for both OS releases
• LSR4300, PRX500, PRX600
• SPI and I2C/S assembly drivers.
• Technical Support and field service for advanced features
- Firmware/ DSP Engineer at JBL Professional / Harman
- Song supervisor, backing vocals (Fire Radio) at Joe Taylor Parade Album / Fire Radio Demo
- Session Guitarist at Suspended Apprehension - Natashia Williams - Demo
- Lead Firmware/ DSP Engineering Consultant at Phoenix Gold
9 years, 10 months at this Job
- Bachelor's - Electrical Engineering w/ Computer Science Option
* Currently involved in the design and Verilog implementation of a 1.2 Gsyms/sec DVB-S2 physical layer transmit chain using a Xiling Ultrascale FPGA * Designed phase noise mitigation algorithms for the second generation Iridium satellite modem serving ground and cross links. Carried out large scale BER and acquisition simulations and helped implement design using Xilinx's System Generator tools * Improved SNR estimation algorithms and implemented multiple bug fixes for existing modem design * Evaluated crest factor reduction methods for a digital "bent-pipe" multi-carrier payload * Carried out link budget analysis for new satellite payloads
- DSP Engineer at Seakr Engineering Inc
- Principal Engineer - DSP Department at Thales Communications Inc
- Software Engineer at Cohere Networks
- Graduate Teaching Assistant at University of Denver, ECE Dept
5 years, 1 month at this Job
- Graduate Coursework - Communications and Signal Processing
- Bachelor of Science - Electrical Engineering
- Staff DSP engineer at Qualcomm
- DSP Engineer at Cirrus Logic
- Senior Staf Engineer at Qualcomm Inc
- Senior Firmware Engineer at Clarity Medical System - Pleasenton
2 months at this Job
- MSEE - MSEE
- - Embedded Systems
- - design
- MSCS Masters Degree - Design and development
- BSEE - Electronic Engineering
Being a part of a small team of engineers
• Develop/tune Noise cancellation algorithms
• Kalimba DSP
• CSR SDK
• Alexa Skill SDK
• Dataflow framework
• Systems tuning translation tool
• Data mining with Python and Scipy-Stack
- DSP Software Engineer at ONvocal Inc.
- DSP Engineer at Bose Corporation
1 year, 7 months at this Job
- BS - Electrical Engineering
Technical Lead of Lowswap- system integration between FPGA, software, and analog front-end and TRs supported during GCS OTA testing and modem certification testing
• FPGA lead of PTS program- developed and integrated Code Concatenate (CC) for anti-jam system.
• Led PTS CC and Robust CNR integration and test
• Re-architected the existing modem hardware to support the anti-jam features. Designed the external memory controller interface to DDR3 running as 800 MHz.
• FPGA Lead on the modem hardware upgraded from Stragix 3 to Arria 5
• Implemented Altera Hard PCIe controller bus interface supported the high speed PCIe interface between FPGA and Freescale processor.
• Implemented non-standard 32-bit CRC with zero clock delay in Verilog.
• Implemented the control signal interface between the digital and analog card which controls the synthesizer with the fast frequency switching time.
• Designed and implemented the RSSI measurement which used to assist the operator during the network initial acquisition. Developed the matlab fixed point model then ported to RTL implementation in verilog.
• Key initial member of FPGA/DSP design team on Direction Finding (DF) o Performed an architecture design and DF algorithm partition between FPGA & DSP processor o Performed the system integration with the DF wideband scan rate up to 1Ghz/sec with DF accuracy +/- 6 degree o Designed the analog AGC and control logic to the analog RF and tuner amplifier/attenuator o Developed the test plan for the production testing and provided the technical support to the manufacture and production line o Worked with Business Development on the customer needs and flow down the requirements to design team
• Led FPGA and System Integration on L-Band SATCOM Modem (Agile) o Developed the high level FPGA architecture to control the analog front-end and synthesizer o Implemented 8-PSK phase & time tracking to support symbol rate from 64Ksps to 6 Msps per RX channel. o Led the system integration and test NCW waveform on WIN-T Increment 2 o Developed the test plan for the build release o System Architect the power-up BIT
• Led FPGA design team to architect and design the Anti-Jam waveform o Architected FPGA to support the Anti-Jam Burst Structure on the DCOM burst o Designed and implemented mid-amble detection and Pilot BER on Altera Stratix III o Developed the ICD for FPGA and Software o Led the system integration and demonstrated the anti-jam waveform to customers
• Led FPGA design team to design and implement the Jamming Solution on Xilinx FPGA Vertex 4 o Implemented Filter, FFT, Mag detection and Freq database detection. o Implemented the NCO span +/20MHZ, Lagrange Interpolation with low latency frequency response. o Demonstrate the jamming onto the GSM signal.
• Led FPGA design team to integrate the RS and Viterbi core into the existing 165A system o Integrated the RS and Viterbi into the existing 165A modem o Developed the testbench to perform the end-to-end hardware simulation o Used the Quartus software to perform the synthesis, place and route
• Led FPGA design team to develop the firmware on Satellite Direct Convert Module (S-DCM) for WIN-T Program o Designed and implemented the IQ imbalance and DC offset on the125Mhz analog front-end
• Trouble-shoot the legacy waveform (Mini-Dama) phase tracking issue on TMS320C50. o Improved the existing phase tracking and time detection to resolve the BER performance issue.
• Designed and implemented the floating and fixed point C-code for Direction Finding. o Designed and implemented Artan LUT and dB LUT. o Modified the existing FFT and FIR Filter.
• Designed the 10-Gigabit/sec Ethernet MAC on Altera Stragix II GX o Implement the State Machine to handle the 10-Gbit data transfer through Marvell XAUI PHY. o Implement the 10-Gigabit Ethernet MAC.
- Principal FPGA/DSP Design Engineer/FPGA Lead at L-3 Linkabit
- System Engineer at Northgrop Grumman - Radio System
- Staff DSP Engineer at VIA Telecom
- Systems Engineer at Siemens Wireless Communication
12 years, 11 months at this Job
- Master of Science - Electrical Engineering
- B.S - Electrical Engineering
Chip design for all digital capacitive imaging touchscreen. Employ high number of channels, with DSP subsystem utilizing efficient, low power analysis & synthesis filter banks. Design RTL in SystemVerilog using Cadence CAD tools. Work on Matlab models to use in RTL functional verification.
- DSP/ASIC Consultant at Sigmasense
- System Engineer Consultant at TDK-Invensense
- System Engineer Consultant at Cypress Semiconductor
- DSP/FPGA Engineer at Weidmann Inc
1 year at this Job
- B.S in Electrical Engineering - Communication and Electronic Systems
SME, algorithm engineer developing data transmission system algorithms for mud pulse telemetry for measurement while drilling (MWD) in oil exploration. Developed a variety of digital modulation, detection, and learning algorithms and software using C/C++, Matlab, Java, and Simulink. Implemented server motor control software for mud pulse telemetry.
- DSP, Embedded, and Machine Learning Software Architect at Antillean Ventures
- DSP/Embedded Software Architect at Autoliv-Veoneer
- Software and Algorithm Engineer/Independent Consultant Aerospace and Oil & Gas at Antillean Ventures - Haliburton
- Distinguished Member of the Technical Staff at Motorola Solutions/Zebra Technologies, Enterprise Mobile Computing
8 months at this Job
- Graduate Certificate in Financial Engineering - Engineering
- Master of Science in Electrical Engineering Degree - Electrical Engineering
- Bachelor of Science in Electrical Engineering Degree - Electrical Engineering
· Developing a convolution engine via DSP development kit (embedded processing), assembly code to maximize processing efficiency. o The system captures the sound signature of phones and simulates them for any audio input o Verified through extensive spectral and time-domain analysis of the system to guarantee functionality o Developed user interface for field technicians (measurement) and utilization in the lab (synthesis) · Trained in DSP implementation, system level design, acoustic testing, and analog electronics
· Developing a convolution engine via DSP development kit (embedded processing), assembly code to maximize processing efficiency.
o The system captures the sound signature of phones and simulates them for any audio input
o Verified through extensive spectral and time-domain analysis of the system to guarantee functionality
o Developed user interface for field technicians (measurement) and utilization in the lab (synthesis)
· Trained in DSP implementation, system level design, acoustic testing, and analog electronics
- Audio Systems DSP Intern at Plantronics
- Technician at Student Affairs Technologies - Cal Poly
3 months at this Job
- B.S. - Electrical Engineering