Black Forest Engineering designs custom integrated circuits for LIDAR systems, primarily for automated vehicles but also for diverse applications from drones to military aircraft.
• Assist in the design and verification of the IC components
• Currently managing a 6-month project with responsibilities including reporting to the customer, updating finance and timeline Gantt charts, and managing subcontractors
• Oversee diverse tasks including designing and using custom testing environments requiring mechanical, electrical, PCB, DEWAR systems, FPGA programming, and software integration such as MATLAB
• Plan, execute, and troubleshoot full test platforms for testing of custom integrated circuits
• Use analytical skills to identify potential sources of errors and correct them in the next iterations
• Quickly jump between diverse side projects with little or no prior knowledge, demonstrating adaptability and rapid learning skills
• Work on and test top of the line integrated circuits for custom LIDAR sensors serving various customer needs
• Managed resources, interfaced with customer, and managed subcontractors for a custom LIDAR project
• As a Project Lead and Test Engineer, resolved an issue stemming from a contractor providing hardware with no operating system; Learned language and methods to create an operating system for the test platform in order to build it, saving a $1.2M project from being held up for 3 months and needing an extra $150k in phase I Technical Lead
• Tasked with oversight on Northrup Grumman project, responsible for coordinating 4 subcontractors to create a low temperature DEWAR system with a custom test interface
• Coordinated redesign of phase II chip using lessons learned to make it better
• Created a GUI interface for command and control of the chip
• Flew all parts of phase I design to Chicago to deliver and demonstrate the interface to the customer
• Interfaced with the customer on all design decisions and project challenges
• 3D designed and printed small components and enclosures and repaired Prusa MK3 3D printer
- IC Design Engineer at Black Forest Engineering
- Assistant Lab Manager at UCCS ECEE Department
1 year, 8 months at this Job
- Master of Science in Engineering - Engineering
- Bachelor of Science in Engineering - Summa Cum Laude graduate
Involved in the design and implementation of sub modules for next generation digital MEMS
converts the output of the MEMS sensor into an appropriate electrical representation analog or digital.
microphones ASIC. The ASIC is the readout interface for MEMS microphone which
modules designed are the digital logics implemented to make the chip smarter in real time by providing enable/disable functions of core modules, trimming of sub logic, the state and modes
Generation of custom layout for Microphone ASIC. Responsible for all aspects of layout for mixed signal circuit including identifying the critical design and layout parameters, important parasitic nodes minimization, area optimization, power routings optimization, Pin System design, for mixed signal circuits. Perform DRC and LVS, Gerber file generation, integrity checks, documentation
(Roster generation, wafer map generation etc.) for tape out submission.
PDK maintenance and verification including tool set and foundry rules verification
Test board design using Altium for testing low power analog/digital microphone ASIC in various
configuration modes. Generated Layout and Schematics for 2-10 layer boards.
updated symbol and footprint libraries for schematic and PCB design tools.
➢ Maintained system documentation of entire PCB layout and fabrication. Implemented layout process in coordination with manufacturers while complying design with IPC standards ad definition.
➢ Responsible for characterization and optimization of RF performance of microphone device in GSM band frequencies. Developed new hardware (test fixture and RF PCBs in Altium) for various RF immunity tests specified for microphone devices like conducted immunity, radiated immunity and impedance measurements. Assisted in developing model of packaged device in Solidworks for RF simulations in CST microwave. Improving RF performance of device by tuning the RF filter implemented in package of device.
➢ Capable of working with minimum to no supervision.
➢ Took training in Electromagnetic Compatibility Engineering from Henry Ott consulting services while being on job.
- IC Design Engineer at Akustica Inc
- Research Assistant at Organization - University of Arkansas
- Held - Engineer 'SD' (Senior Engineer), Control Electronic Division at Indian Space Research Organization
4 years, 7 months at this Job
- Master of Technology - Electronics
- B.S. - Electronics
• Restorative Therapies Group (RTG) - Most recent assignment involved design, simulation, layout and implementation of telemetry transceiver (TSMC 0.25um) used in next-generation SynchroMed(TM) II pump and catheter implantable drug infusion system that stores and delivers medication into the intrathecal space. Current next-generation design is ahead of schedule. ◦ Leveraged Earned Value Management (EVM) technique for measuring performance and progress. Provided accurate forecasts of project management performance metrics such as scope, time and cost. ◦ Utilized interpersonal skills to interact with team members and multiple team leads across varying engineering disciplines to accomplish work. Understanding of interdisciplinary interaction and associated deliverables was required to accelerate schedule. ◦ Extensive lab characterization of existing SynchroMed(TM) II pump system was also performed to create baseline for next-generation design. Duties included full system telemetry testing and characterization utilizing existing development platform and lab stimulus equipment.
• Designed, simulated and directed layout of analog band-pass filters for electrically evoked compound action potential system (EECAPS) used in closed-loop spinal cord stimulation (SCS). Primary focus was maintaining high signal-to-noise ratio to ensure acceptable system accuracy and performance.
- Principal IC Design Engineer at Medtronic, Inc
- Senior Analog IC Design Engineer at Micron Technology, Inc
- Senior Electrical Engineer at Boston Scientific Corporation
- at Advanced Cardiac Physiology and Anatomy - University of Minnesota
1 year, 5 months at this Job
- M.S. - Electrical Engineering
- B.S. - Electrical Engineering
- A.S. - Engineering Science
• Developing digital IP core(PHY layer) used in broadband communication.
• Implementing/verifying DSP datapath(FIR, adaptive filters, etc.) based on specification from system engineer.
• Implementing various control logic: FIFO, CPU interface, FFT, ADC interface, etc.
• Writing synthesis-friendly Verilog code(Lint, STA) and DFT-ready for scan test and BIST.
• Providing synthesis constraint and performing LEC checking.
• Block/chip level verification using SystemVerilog/C testbench.
• Solving DFT/STA issue.
• Lab testing for chip bring up.
- Digital IC Design Engineer at Broadcom System
- FPGA/ASIC Engineer at
- Hardware Engineer at PairGain/ADC Telecommunication
- Hardware Design Engineer at D-LINK System Inc
12 years, 7 months at this Job
- Master of Science degree in Electrical and Computer Engineering - Electrical and Computer Engineering
- Bachelor of Science degree - Electronics Engineering
- Senior Analog IC Design Engineer at QST Solution (On Semiconductor), San Jose, CA
- Analog IC Design Engineer at NXP
- Analog IC Design Engineer at Sand 9 Company
- Analog IC Design Engineer at Texas Instruments
8 months at this Job
Worked on two ARM SOC chips, one for smallcell 4G LTE, and one for home multimedia router and server.
• Integrated several IP cores into the SOC chip:DPI, I2S, DECT (cordless phone), SIM card reader, RTC, PCIE, PHY,
• IP Developed: APB bus bridge, XORDMA for RAID 5, CLK and RST logic for DECT core, chip2chip protocol.
• Architecting a chip2chip synchronization protocol, a proprietary multi-chip module communication protocol and implementation used to synchronize operations in two chips. Writing specifications, implementation, and testing.
• PCIE core integration, finding the right configuration parameters that fit our use pattern to generate PCIE core, glue logic, simulation, testing, and validation of core.
• PCIE PHY integration, testing and validation with PCIE core.
• CDC and LINTING for various IP cores.
• Writing simulation testbench of RTL and gate-level simulation and verification, at unit level and top level.
• Wrote a script to load samsung memory model, which involves reverse engineer the bit scrambling inside the model.
• Wrote a script to scan CVS repository to browse latest checked in files; build an SQL database of changed files and sort them by username, tag, date, ..etc. This script is extremely helpful in the weeks before code freeze.
• Architectures familiar with: ARM, AXI, AHB, SOC, PCIe.
- Senior Technical Staff IC Design Engineer at Mindspeed Tech
- Senior Technical Staff IC Design Engineer at LSI Corp
- Senior Hardware Engineer at Tarari Inc
- Senior Hardware Engineer at Intel Corp
9 years at this Job
- - Computer Engineering
- BS - Engineering
Hearing Aid MEMS Microphone amplifier with I2C Interface and fuse memory with programmable features such as band-pass filter, current, sensitivity, oscillator frequency, etc. Blocks included bandgap, regulator, power on reset, oscillators, low voltage drivers, charge pumps, etc. Very tight phase matching reel to reel, low noise, and low power requirements. ◦ Led small analog/digital team to integrate custom fuse memory controller via I2C interface. Designed custom logic and analog control to/from controller with full system verification in AMS and spectre. ◦ Hearing Aid MEMS Microphone amplifier with highly linear rail-to-rail class AB drive capability for low THD and IMD. Low noise, low power with small footprint requirements. Currently in production. ◦ Hearing Aid MEMS Microphone amplifier with class AB drive capability. Low noise, low power with small footprint requirements. Currently in production. ◦ Designed various Low power Sub miniature Hearing Aid Electret Microphones which are currently in production.
- Principal IC Design Engineer at Knowles Electronics
- Analog Design Engineer at Freescale Semiconductor
13 years, 11 months at this Job
- MS in Electrical Engineering - Electrical Engineering
- IC Design Engineer-II at Broadcom Pvt Ltd
- Intern at Broadcom Pvt Ltd
3 years, 6 months at this Job
- Master of Science - VLSI
- Bachelor of Engineering - Electronics and Communications
• Worked on Pre-amplifier IC's for reading from and writing to hard disc drives at data rates on the order of 4.5 Gbps.
• Worked on writer portion of the Pre-amp IC.
• Held Technical lead position on Writer.
• Worked on Spin torque oscillator(STO) driving circuit.
• Held technical lead position on STO driver circuit.
• Greatly strengthened my knowledge of bipolar transistors and issues associated with BICMOS processes.
- Senior Staff Analog IC Design Engineer at Marvell Semiconductor
- Analog Design Engineer at Encore Semiconductor
- Senior Analog IC Design Engineer at Micron
- Senior Analog IC design Engineer at Xilinx Inc
2 years, 3 months at this Job
- Master's - Electrical Engineering
o Verification of the design including, silicon probing, chip evaluation and test. 2 o Design and lead of the new product, defining the specs per customer requests, design and working with Page layout group. (2 tape-out experiences)
- Analog IC Design Engineer at Alpha and Omega Semiconductor
- at on-Chip
- at on-Chip
- at on-Chip
2 years, 2 months at this Job
- PhD - Electronic Engineering
- M.Sc - Electronic Engineering
- B.Sc - Electronic Engineering